the PCI Bus demystified phần 9 pps

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system slot in Segment B may be used for a peripheral card. Note that

the physical size of the PCI bridge chip dictates that the pallet bridge

board span several slots.

The configuration in the previous slide could be easily extended

to accommodate a third Segment C. However, the problem with

that approach is that transactions targeted at Segment C would have

to pass through two bridges incurring latency in each one. It would

be preferable to position the host processor so that it could bridge

directly to each of the other segments.

Figure 9-10 shows a solution to that problem utilizing pallet

bridge boards. The host processor resides in the system slot of

Segment B and bridges directly to Segments A and C. Note that

Segment A must have its system slot on the right and that two

different bridge boards are required—one that bridges from right

to left and another that bridges from left to right. In practice, the

same PC board can be used for both forms with different mounting

locations for the connectors.

The same strategy can be implemented with front-loading bridge

modules. At least one vendor (Teknor) currently offers a dual-wide

SBC that incorporates the bridge function.

Figure 9-10: CPCI bridging of three segments.

PCI Bus Demystified

Segment A Segment B Segment C

“Left-hand”

Bridge

“Right-hand”

Bridge

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Summary

CompactPCI is an industrial implementation of the PCI bus.

It uses a passive backplane and standardized Eurocard mechanics.

The use of low-capacitance connectors allows up to eight PCI slots

per backplane segment.

CompactPCI defines additional signals beyond the basic PCI

protocol. Among the features provided by these extra signals are:

system slot identification, system enumeration and geographical

addressing. Every board requires series termination of the bus signals.

CompactPCI