Siêu thị PDFTải ngay đi em, trời tối mất

Thư viện tri thức trực tuyến

Kho tài liệu với 50,000+ tài liệu học thuật

© 2023 Siêu thị PDF - Kho tài liệu học thuật hàng đầu Việt Nam

the PCI Bus demystified phần 7 pps
MIỄN PHÍ
Số trang
20
Kích thước
138.4 KB
Định dạng
PDF
Lượt xem
1031

the PCI Bus demystified phần 7 pps

Nội dung xem thử

Mô tả chi tiết

125

The notion of bridging plays a significant role in PCI architecture

primarily due to electrical limitations that impose a severe limit on

the number of devices residing on a single PCI bus segment. In some

cases it is also desirable to functionally isolate portions of the system

so they can operate in parallel.

Bridge Types

In this chapter we’re primarily concerned with the PCI-to-PCI

(P2P) bridge, that is, a bridge that connects two PCI bus segments.

The P2P bridge is defined in PCI-to-PCI Bridge Architecture Specifi￾cation, Rev. 1.1, December 1998. But before delving into the details

of the P2P bridge, we should note briefly that there are two other

types of bridges that serve specific roles as illustrated in Figure 8-1.

Host-to-PCI Bridge

None of today’s popular processor architectures has a PCI bus

coming directly off the chip. Rather, each processor defines its own

local bus optimized around the specific architecture. External cache

and main memory often reside on the local processor bus. Some local

busses also support multiple processors.

PCI Bridging

C H A P T E R 8

126

The Host-to-PCI bridge provides the translation from the local

processor bus to the PCI. In conventional PC environments, the

Host-to-PCI bridge, often referred to as the “North Bridge,” is one

element of the chipset and is usually contained in the same chip that

manages main memory and the Level 2 cache. To the extent feasible,

the architecture of the Host-to-PCI bridge mimics the P2P bridge

specification.

PCI-to-Legacy Bus Bridge

Someday, the ISA bus will disappear from PC architecture. Some￾day income tax forms will be understandable. But for the time being,

“legacy” busses such as ISA and EISA are supported through the

mechanism of a PCI-to-Legacy Bridge. Like the Host-to-PCI bridge,

this is usually an element of the chipset that also incorporates such

traditional features as IDE, interrupt and DMA controllers. Legacy

bridges often implement subtractive decoding because the cards on

the legacy bus aren’t plug-and-play and thus can’t be configured.

The PCI-to-ISA bridge is usually referred to as the “South Bridge.”

PCI Bus Demystified

Figure 8-1: PCI bridge hierarchy.

Host-PCI

Bridge

Memory

CPU

Host

Bus

PCI

Device

PCI-PCI

Bridge 1

PCI-ISA

Bridge

PCI-PCI

Bridge 2

PCI

Device

PCI

Device

PCI

Bus 0

ISA Bus

PCI

Bus 1

PCI Bus 2

PCI Option

Card

Cache

Legacy

Device

Tải ngay đi em, còn do dự, trời tối mất!