Lumped Elements for RF and Microwave Circuits phần 5 pot

188 Lumped Elements for RF and Microwave Circuits

Table 5.5

ABCD-, S-, Y-, and Z-Matrices for Ideal Lumped Capacitors

ABCD Matrix S-Parameter Matrix Y-Matrix Z-Matrix

F

jvC −jvC

−jvC jvC G 3

1 −j

vC

0 1 4 1

−j

vC + 2Z0 3

−j

vC 2Z0

2Z0

−j

vC

4

F 1 0

jvC 1

G 1

Z0 − j 2

vC 3

−Z0

−j 2

vC

−j

vC −Z0

4 3 −j

vC

−j

vC

−j

vC

−j

vC

4

References

[1] Ballou, G., Capacitors and Inductors in Electrical Engineering Handbook, R. C. Dorf, (Ed.),

Boca Raton, FL: CRC Press, 1997.

[2] Walker, C. S., Capacitance, Inductance and Crosstalk Analysis, Norwood, MA: Artech

House, 1990.

[3] Durney, C. H., and C. C. Johnson, Introduction to Modern Electronic Genetics, New York:

McGraw-Hill, 1969.

[4] Zahn, M., Electromagnetic Field Theory, New York: John Wiley, 1979.

[5] Ramo, S., J. R. Whinnery, and T. Van Duzer, Fields and Waves in Communication

Electronics, 2nd ed., New York: John Wiley, 1984.

[6] Abrie, P. D., Design of RF and Microwave Amplifiers and Oscillators, Norwood, MA: Artech

House, 1999, Chap. 7.

[7] Weber, R. J., Introduction to Microwave Circuits, New York: IEEE Press, 2001.

[8] Weber, R. J., Introduction to Microwave Circuits, New York: IEEE Press, 2001.

[9] American Technical Ceramics, Huntington Station, NY.

[10] Dielectric Lab, New York.

[11] AVX Corporation, Myrtle Beach, SC.

[12] Ingalls, M., and G. Kent, ‘‘Monolithic Capacitors as Transmission Lines,’’ IEEE Trans.

Microwave Theory Tech., Vol. MTT-35, November 1987, pp. 964–970.

[13] de Vreede, L. C. N., et al., ‘‘A High Frequency Model Based on the Physical Structure

of the Ceramic Multilayer Capacitor,’’ IEEE Trans Microwave Theory Tech., Vol. 40,

July 1992, pp. 1584–1587.

Capacitors 189

[14] Sakabe, Y., et al., ‘‘High Frequency Measurement of Multilayer Ceramic Capacitors,’’

IEEE Trans. Components, Packaging Manufacturing Tech.—Part B, Vol. 19, February 1996,

pp. 7–12.

[15] Murphy, A. T., and F. J. Young, ‘‘High Frequency Performance of Multilayer Capacitors,’’

IEEE Trans. Microwave Theory Tech., Vol. 43, September 1995, pp. 2007–2015.

[16] Goetz, M. P., ‘‘Time and Frequency Domain Analysis of Integral Decoupling Capacitors,’’

IEEE Trans. Components, Packaging Manufacturing Tech.—Part B, Vol. 19, August 1996,

pp. 518–522.

[17] Fiore, R., ‘‘RF Ceramic Chip Capacitors in High RF Power Applications,’’ Microwave J.,

Vol. 43, April 2000, pp. 96–109.

[18] Lakshminarayanan, B., H. C. Gordon, and T. M. Weller, ‘‘A Substrate-Dependent CAD

Model for Ceramic Multilayer Capacitors,’’ IEEE Trans. Microwave Theory Tech.,

Vol. 48, October 2000, pp. 1687–1693.

[19] Semouchkina, E., et al., ‘‘Numerical Modeling and Experimental Investigation of Reso￾nance Properties of Microwave Capacitors,’’ Microwave Optical Tech. Lett., Vol. 29,

April 2001, pp. 54–60.

[20] Fiore, R., ‘‘Capacitors in Broadband Applications,’’ Applied Microwave and Wireless,

May 2001, pp. 40–54.

6

Monolithic Capacitors

Monolithic or integrated capacitors (Figure 6.1) are classified into three catego￾ries: microstrip, interdigital, and metal–insulator–metal (MIM). A small length

of an open-circuited microstrip section can be used as a lumped capacitor with

a low capacitance value per unit area due to thick substrates. The interdigital

geometry has applications where one needs moderate capacitance values. Both

microstrip and interdigital configurations are fabricated using conventional MIC

techniques. MIM capacitors are fabricated using a multilevel process and provide

the largest capacitance value per unit area because of a very thin dielectric layer

sandwiched between two electrodes. Microstrip capacitors are discussed briefly

below. The interdigital capacitors are the topic of the next chapter and MIM

capacitors are treated in this chapter.

All metals printed on a GaAs substrate will establish a shunt capacitance

to the back side ground plane, C, given by

C = Cp + Ce (6.1)

where Cp is the parallel plate capacitance and Ce is the capacitance due to edge

effects. The parallel plate capacitance to the backside metal may be expressed

as

Cp = A 152 × 10−8 pF/mm

2 (75-mm substrate) (6.2)

= A 91 × 10−8 pF/mm

2 (125-mm substrate)

where A is the top plate area in square microns. As an approximation, Ce can

be taken as [1]

191

192 Lumped Elements for RF and Microwave Circuits

Ce = P 3.5 × 10−5 pF/mm (75-mm substrate) (6.3)

= P 5 × 10−5 pF/mm (125-mm substrate)

where P is the perimeter of the capacitor in microns.

An accurate printed capacitor model must treat the capacitor as a microstrip

section with appropriate end discontinuities as discussed in Chapter 14.

Monolithic MIM capacitors are integrated components of any MMIC

process. Generally, larger value capacitors are used for RF bypassing, dc blocking,

and reactive termination applications, whereas smaller value capacitors find

usage as tuning components in matching networks. They are also used to realize

compact filters, dividers/combiners, couplers, baluns, and transformers.

MIM capacitors are constructed using a thin layer of a low-loss dielectric

between two metals. The bottom plate of the capacitor uses first metal, a thin

unplated metal, and typically the dielectric material is silicon nitride (Si3N4 )

for ICs on GaAs and SiO2 for ICs on Si. The top plate uses a thick plated

conductor to reduce the loss in the capacitor. The bottom plate and the top

plate have typical sheet resistances of 0.06 and 0.007 V/square, respectively,

and a typical dielectric thickness is 0.2 mm. The dielectric constant of silicon

nitride is about 6.8, which yields a capacitance of about 300 pF/mm2

. The top

plate is generally connected to other circuitry by using an airbridge or dielectric

crossover, which provides higher breakdown voltages. Typical process variations

for microstrip and MIM capacitors are compared in Table 6.1.

Normally MIM capacitors have two plates, however, three plates and two￾layer dielectric capacitors have also been developed.

6.1 MIM Capacitor Models

Several models for MIM capacitors on GaAs substrate have been described in

the literature [2–5]. These include both EC and distributed models, which are

discussed next.

Figure 6.1 Monolithic capacitor configurations: (a) microstrip, (b) interdigital, and (c) MIM.