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An Experimental Approach to CDMA and Interference Mitigation phần 3 pdf
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An Experimental Approach to CDMA and Interference Mitigation phần 3 pdf

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2. Basics of CDMA for Wireless Communications 39

From the considerations made above, it is evident that the most peculiar

and crucial function which the DS/SS receiver has to cope with is timing re￾covery. The basic difference between the function of symbol timing recovery

in a conventional modem for narrowband signals and code alignment in a

wideband SS receiver lies in a fundamental difference in the statistical prop￾erties of the data bearing signal. In narrowband modulation the data signal

bears an intrinsic statistical regularity on a symbol interval Ts that is, prop￾erly speaking, it is cyclostationary with period Ts . Clock recovery is to be

carried out with an accuracy of some hundredths of a Ts , and is not particu￾larly troublesome. Owing to the presence of the spreading code, the DS/SS

signal is cyclostationary with period LTc (in a short code arrangement), but

the receiver has to derive a timing estimate with an accuracy comparable to a

tenth of the chip interval Tc to perform correlation and avoid Inter-Chip In￾terference (ICI).

10-6

10-5

10-4

10-3

10-2

10-1

2 4 6 8 10 12

Eb/N0 (dB)

BER(9.6 dB)=10-5

BER(6.8 dB)=10 -3

Figure 2-9. BER of a matched-filter receiver for BPSK / QPSK transmission

over the Gaussian channel.

This simple discussion suggests that timing estimation becomes more and

more involved as L gets large (long codes). Unfortunately, in practical

applications of DS/SS transmissions we always have 1 L  even for short

40 Chapter 2

codes (typically L t 31), so that the problem of signal timing recovery with

a sufficient accuracy is much more challenging for wideband DS/SS signals

than for narrowband modulation, and is usually split in the two phases of

coarse acquisition and fine tracking. The first is activated during receiver

startup, when the DS/SS demodulator has to find out whether the intended

user is transmitting, and, in the case in which he/she actually is, coarsely es￾timate the signal delay to initiate fine chip time tracking and data detection.

Code tracking is started upon completion of the acquisition phase and aims

at locating the optimum sampling instant of the chip rate signal to provide

ICI-free samples (such as (2.59)) to the subsequent digital signal processing

functions.

M

cm

Chip Pulse

Matched Filter

g (t)

R

6

1

M

r(t) ~ y(t) ~

mTc

y m~ z k ~ d k

~^

Figure 2-10. Baseband equivalent of a DS/SS receiver.

After examining the main functions for signal detection, we present some

introductory considerations about the practical implementation of a DS/SS

receiver. In this respect Figure 2-11 shows a scheme of a DS/SS receiver

highlighting also the different signal synchronization functions (carrier fre￾quency/phase and timing) which often represent the real crux of good mo￾dem design. We have denoted by ˆ 'f , ˆ

T , and Wˆ the estimates of the carrier

frequency offset, phase offset, and chip timing error, respectively, relevant to

the useful signal. As already discussed (see Figure 2-8), the baseband I/Q

components of r t( ) are derived via a baseband I/Q converter as the one in

Figure 2-3. Such a converter is usually implemented at IF in double conver￾sion receivers or directly at RF in low cost, low power receivers (this is the

case, for instance, for mobile phones).

The basic architecture of Figure 2-11 can be entirely implemented via

DSP components by performing Analog to Digital Conversion (ADC) as

early as possible, at times directly on the IF (intermediate frequency) signal

provided at the output of the RF to IF front end conversion stage in the re￾ceiver. In so doing, the baseband received signal r t ( ) in Figure 2-11 is actu￾ally a sampled digital signal, carrier recovery and chip matched filtering are

digital, and the ‘sampler’ is just a decimator/interpolator that changes the

clock rate of the digital signal. The ADC conversion rate of r t ( ) is, in fact,

invariably faster than the chip rate to perform chip matched filtering with no

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